Electronics Design

This page documents the Version 1, Revision 1 (V1R1) electronics design of the hyperspectral imager. If you are working on the firmware or integration of the HSI payload, you should find everything you need here.

Full Assembly

Carrier Board	Carrier Board + Optics	Carrier Board + Optics + FPGA Board

Table 1: Renders of V1R1, fall 2017.

PCB - Top View	Assembled PCB - Top View	PCB - Perspective

Table 2: Altium Designer Screenshot of production PCB, December 2017

PCB without Components	PCB with components	Full camera assembly

Table 3:Pictures of production PCB, January 2018

Technical Specifications

System Design

Power Supply

To allow for maximum flexibility in development and testing (and unknown satellite provider) the V1R1 is designed for an input voltage of 5-18V, at 6A. Supplied with the prototype is a 12V, 4A, power supply for desktop use but we can solder on a connector for drone/balloon testing. The input voltage is connected to a switch-mode power supply module for maximum efficiency and then split into four different power rail for the image sensor and FGPA. The PicoZed board requires 5V, 3.3V and 1.8V and the image sensor 2.0V, 3.0V and 3.3V.

The main SMPS can be controlled through the external connector and shut of power to the entire connector. The four power rails will turn on in sequence after the PicoZed power supplies have turned on using the "Power Good" functionality of the regulators. After all the regulators onboard the PicoZed board are up and running VCCIO_EN pin will go high and turn on the carrier card regulators. Each of the power rails have a designated test point located next to the regulator.

When the camera is powered the green LED labeled "Power" will light up.

List of important parts:

PCBA Designator	Functionality	Part Number	Manufacturer
U1	5V SMPS	LMZ31506	Texas Instruments
U2	1500mA LDO	TPS74801	Texas Instruments
U3	500mA LDO	TPS74701	Texas Instruments

Image Sensor

The image sensor used is a CMOSIS CMV2000. The data is read out using low voltage differential singling (LVDS) and controlled using SPI. For maximum quantum efficiency (QA), the variation of the sensor processed on 12um epitaxial (E12) SI wafer is used. The thicker epic-layer increases the sensitivity to light above 600nm significantly. Due to the sensitivity due to high speed data transfer, the data lines are carefully impedance matched following the TIA/EIA 644 standard for LVDS signals.

The following pin assignment on the PicoZed is used to control the CMV2000.

PicoZed Pin	Functionality	Comment
PS_MIO_9	OE
PS_MIO_10	T_EXP1
PS_MIO_11	T_EXP2
PS_MIO_12	Frame Request
PS_MIO_13	SYS_RES_N
PS_MIO_46	SPI Mosi
PS_MIO_47	SPI Miso
PS_MIO_48	SPI Clock
PS_MIO_49	SPI Enable
PS_MIO_51	UART Selector

FPGA Interface (PicoZed)

SD Card Interface

PicoZed Pin	Functionality	Comment
PS_MIO_40	Clock
PS_MIO_41	Commands
PS_MIO_42	Data0
PS_MIO_43	Data1
PS_MIO_44	Data2
PS_MIO_45	Data3
PS_MIO_50	CD

USB-UART Connection

USB connection for debugging. It is connected to UART through a FTDI USB-UART bridge that provides USB driver firmware, meaning there's no need to install a driver and it can be read/written using a regular terminal with baud rates up to 3 million symbols per second.