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Technical Specifications

Resolution: 2048x1088

Storage: 36GB (4GB eMMC + 32GB microSD)

Memory: 1GB

Processor: Dual Core ARM A9 (Zynq 7030 Series FGPA)

Input Voltage: 4.5-14.5V

Maximum current: 6A 

Connectivity: USB 2.0, UART

Power Supply

To allow for maximum flexibility in development and testing (and unknown satellite provider) the V1R1 is designed for an input voltage of 5-14.5V, at 6A. Supplied with the prototype is a 12V, 5.5A, power supply for desktop use but we can solder on a connector for drone/balloon testing. Any AC/DC power adapter with a 2.1mm/5.5mm barrel jack can be used as long as it is between 5-14.5V and supports currents up to 5A.

The input voltage is connected to a switch-mode power supply module for maximum efficiency and then split into four different power rail for the image sensor and FGPA. The PicoZed board requires 5V, 3.3V and 1.8V and the image sensor 2.0V, 3.0V and 3.3V.

The main SMPS can be controlled through the external connector and shut of power to the entire connector. The four power rails will turn on in sequence after the PicoZed power supplies have turned on using the "Power Good" functionality of the regulators. After all the regulators onboard the PicoZed board are up and running VCCIO_EN pin will go high and turn on the carrier card regulators. Each of the power rails have a designated test point located next to the regulator. 

When the camera is powered the green LED labeled "Power" will light up.  

List of important parts:

Image Sensor 

The image sensor used is a CMOSIS CMV2000. The data is read out using low voltage differential singling (LVDS) and controlled using SPI. For maximum quantum efficiency (QA), the variation of the sensor processed on 12um epitaxial (E12) SI wafer is used. The thicker epic-layer increases the sensitivity to light above 600nm significantly. Due to the sensitivity due to high speed data transfer, the data lines are carefully impedance matched following the TIA/EIA 644 standard for LVDS signals.

Clock Generation

Control Pins 

The following pins are connected to the Program System (PS) part of the FGPA and are used to control the sensor functionality.

*This pin should have pin pulled high by a resistor so it's not, therefore it's necessary to pull it low immediately after boot.

Data Pins

The following pins are connected to the Program Logic (PL) part of the FGPA and are used to read out data from the sensor. 

Quantum Efficiency

USB 2.0 Connection 

The USB port labeled "DATA" is the USB 2.0 line and it is used to stream the picture. The imager uses USB-C ports because they can support USB 3.1, with a high enough data rate to stream the image. USB-C can also (in future prototypes) be used to power the entire design, but for now they are implemented as USB 2.0 ports.

USB-UART Connection

USB connection for debugging. It is connected to UART through a FTDI USB-UART bridge that provides USB driver firmware, meaning there's no need to install a driver and it can be read/written using a regular terminal with baud rates up to 3 million symbols per second. A TX and RX indicator is provided on the pcb for debug, to indicate if the camera is receiving or sending data over UART. 

Because of limited MIO pins available the USB-UART is shared with the bus connector UART. A 2-channel single-pole double throw (SPDT) bidirectional switch is used to switch between the two connectors. By default it's routed to the USB-UART but by setting pin PS_MIO_51 high the data is routed to pin 3 and 4 on the bus connector. 

SD Card Interface

The payload supports microSD cards for up to 32GB of storage. Because SDIO is considered a high-speed signal it is routed on the bottom layer of the PCB and all the clock and data traces are length matched to xx mm.

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JTAG Connector 

JTAG Connector 

There's a 14-pin JTAG Xilinx connector on the board for programming the two ARM cores and FPGA. In addition to the JTAG lines, there's a 3V3 reference voltage and GND pin.

The Xilinx programmer that is compatible can be found here:

https://www.xilinx.com/products/boards-and-kits/hw-usb-ii-g.html#documentation

LED Indicators

In addition to the green power LED on the PicoZed board, there are four orange LEDs on the carrier board with the following functionality:

Board Outline and Material

External Connector (Bus Connector)

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Getting Started

NB! The power supply is limited to 5.5A, make sure the code you are running won't draw that much power! (This is common in FPGA payloads, at full speed they can draw much more

current than the satellite can handle). This is a prototype and there might be bugs, so pay close attention to the temperature of the device and if you find bugs. Ideally you plug the device in series with a multimeter or power meter to measure current consumption. From Fred's v4 prototype the image sensor will get hot and we might need to add a heat sink or fan.  

Proper mode of operation:

1) Power on, with the PicoZed board in (should never be removed).

2) Set the OE pin LOW to enable the SPI logic level converter for the image sensor.

3) Set the UART selector LOW to route the signal through the debug USB connector.

Frequently Asked Questions (FAQ)

Suggested Design Changes for V2 (flight version)

• Use 8.5x8.5cm board by Trenz electronics (industrial, more FPGA options and more MIO pins)
• Add pull-up resistor to SPI logic level converter enable pin to avoid excess current drain.