TDT01 is a specialization course focusing on specialized topics within computer architecture. This year's edition will focus on 1) Server CPU Microarchitecture, 2) Sustainability and Performance Analysis, and 3) Hardware generation and compilers...
Course responsible: Magnus Själander, Magnus Jahre, and Rakesh Kumar
Final test 2024
Date: 28th November (Thursday)
Time: 11:00 to 12:00
Place: F2 Gamle Fysikk
Students 2024
Bjerde, Juni Weisteen
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Gynnild, Odd Magne Lundereng
Harmati, Kornel
Jacobsen, Ola Horg Johansen, Markus Bøyum
Jaatun, Lars Andreassen
Kuklinski, Patryk
Larsen, Kristian
Lundsaunet, Børge
Løvhaug, Henrik Tøn
Mack, Stefan
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Meeting 1: Startup meeting - Friday, 13th September at 14:00, Realfagbygget R93 (Slides)
Meeting 2: Discussion 1 - Friday, 4th October at 14:00, Realfagbygget R93 (Topic: Server CPU Microarchitecture)
Meeting 3: Discussion 2 - Friday, 25th October at 14:00, Realfagbygget R93 (Topic: Hardware generation and compilers)
Meeting 4: Discussion 3 - Friday, 15th November at 14:00, Realfagbygget R93 (Topic: Sustainability and Performance Analysis)
Reading list (preliminary)
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Server CPU Microarchitecture
1.
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Profiling a warehouse-scale computer
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(Jonatan Solheim and Kristian Larsen)
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Front-End Stalls with Uneven Block Size Instruction Cache
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(Eik Hvattum Røgeberg and Juni Weisteen Bjerde)
3.ACIC: Admission-Controlled Instruction Cache (Filip Kristoff Ørn and Børge Lundsaunet)
Sustainability and Performance Analysis
4. FOCAL: A First-Order Carbon Model to Assess Processor Sustainability (Lars Andreassen Jaatun and Magnus Øvre Sygard)
5.Per-Instruction Cycle Stacks Through Time-Proportional Event Analysis
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(Patryk Kuklinski and Markus Bøyum Johansen)
6. AIO: An Abstraction for Performance Analysis Across Diverse Accelerator Architectures (Odd Magne Gynnild and Kornel Harmati)
Hardware generation and compilers
7. RipTide: A Programmable, Energy-Minimal Dataflow Compiler and Architecture (Stefan Mack, Henrik Løvhaug, and Arran Gabriel)
8. R-HLS: An IR for Dynamic High-Level Synthesis and Memory Disambiguation based on Regions and State Edges (Erlend Paulsen Skaaden, Hans-Marius Øverås, and Magne Tenstad)
9. Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations (Jakub Ostrzołek and Benjamin Shahzad-Landsverk)