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The image sensor used is a CMOSIS CMV2000. The data is read out using low voltage differential singling (LVDS) and controlled using SPI. For maximum quantum efficiency (QA), the variation of the sensor processed on 12um epitaxial (E12) SI wafer is used. The thicker epic-layer increases the sensitivity to light above 600nm significantly. Due to the sensitivity due to high speed data transfer, the data lines are carefully impedance matched following the TIA/EIA 644 standard for LVDS signals.
Control Pins
The following pins are connected to the Program System (PS) part of the FGPA and are The following pin assignment on the PicoZed is used to control the CMV2000sensor functionality.
| PicoZed Pin | Net | Functionality | Comment |
|---|---|---|---|
| PS_MIO_9 | OE | ||
| PS_MIO_10 | T_EXP1 | ||
| PS_MIO_11 | T_EXP2 | ||
| PS_MIO_12 | Frame Request | ||
| PS_MIO_13 | SYS_RES_N | ||
| PS_MIO_46 | SPI Mosi | ||
| PS_MIO_47 | SPI Miso | ||
| PS_MIO_48 | SPI Clock | ||
| PS_MIO_49 | SPI Enable | ||
| PS_MIO_51 | UART Selector |
Data Pins
The following pins are connected to the Program Logic (PL) part of the FGPA and are used to read out data from the sensor.
| PicoZed Pin | Net Name | Comment |
|---|---|---|
| JX1_LVDS_2_P | CMV_OUT_P | |
| JX1_LVDS_2_N |
| |
| JX1_LVDS_4_P | ||
| JX1_LVDS_4_N | ||
| JX1_LVDS_6_P | ||
| JX1_LVDS_6_N | ||
| JX1_LVDS_7_P | ||
| JX1_LVDS_7_N | ||
| JX1_LVDS_8_P | ||
| JX1_LVDS_8_N | ||
| JX1_LVDS_9_P | ||
| JX1_LVDS_9_N | ||
| JX1_LVDS_10_P | ||
| JX1_LVDS_10_N | ||
| JX1_LVDS_11_P | ||
| JX1_LVDS_11_N | ||
| JX1_LVDS_12_P | ||
| JX1_LVDS_12_N | ||
| JX1_LVDS_13_P | ||
| JX1_LVDS_13_N | ||
| JX1_LVDS_14_P | ||
| JX1_LVDS_14_N | ||
| JX1_LVDS_15_P | ||
| JX1_LVDS_15_N | ||
| JX1_LVDS_16_P | ||
| JX1_LVDS_16_N | ||
| JX1_LVDS_17_P | ||
| JX1_LVDS_17_N | ||
| JX1_LVDS_18_P | ||
| JX1_LVDS_18_N | ||
| JX1_LVDS_19_P | ||
| JX1_LVDS_19_N | ||
| JX1_LVDS_20_P | ||
| JX1_LVDS_20_N | ||
| JX1_LVDS_21_P | ||
| JX1_LVDS_21_N | ||
| JX1_LVDS_22_P | ||
| JX1_LVDS_22_N | ||
| JX1_LVDS_23_P | ||
| JX1_LVDS_23_N |
FPGA Interface (PicoZed)
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